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AR# 69222

Zynq UltraScale+ MPSoC - What PHY devices are tested with the Zynq MPSoC CAN controller?

Description

When choosing a PHY device to be interfaced with Zynq UltraScale+ MPSoC devices, it is important to consider the following criteria:

  • Is the PHY device supported with baremetal or Uboot or Linux?
  • Is the PHY tested with Xilinx devices?

Xilinx can only provide assistance for the devices listed as 'Xilinx Tested and Supported'.

Solution

The following PHY devices have been tested and validated using Xilinx PS CAN IP:

In baremetal testing, connect two separate Zynq MPSoC boards and have the CAN nodes on different boards communicate with each other.

This test cases include:

  1. CAN0 and CAN1 cross connected for external loopback setup
  2. Configure CAN0 controller as transmitter
  3. Configure CAN1 controller as receiver
  4. Send Packet from CAN0
  5. Validate receive packed data from CAN1

External CAN PHYXilinx IPBaremetal Test Status
TI SN65HVD232CAN0PASS
TI SN65HVD232CAN1PASS
NXP TJA1040CAN0PASS
NXP TJA1040CAN1PASS
ATA6561CAN0PASS
ATA6561CAN1PASS

Note: All tests are carried out on Vivado 2016.4.

AR# 69222
Date 05/26/2017
Status Active
Type General Article
Devices
  • Zynq UltraScale+ MPSoC
IP
  • CAN
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