Why does the ulpsactivenot only assert for one clock period for the MIPI D-PHY RX?
According to the MIPI Specification, the ulpsactivenot should remain asserted until the source starts Mark-1.
This issue occurs in the Vivado 2017.2 and 2017.4 generated LogiCORE MIPI D-PHY.
This issue is fixed in Vivado 2017.3, and has been fixed in Vivado 2018.1 and later.
It is recommended to update to the latest version of the IP.