AR# 69298

2018.2 Zynq UltraScale+ MPSoC, Vivado - PS DDR Zynq MP DRAM read eye test hangs


When using the read eye test example from Xilinx SDK, a few taps are read and then the system hangs.

A debugger is unable to attach to the processor to debug the hang.

How do I resolve this issue?


To work around this issue, replace the attached file in the memory test src directory and recompile the memory test. 

A version for 2018.2 and 2017.1/2  is provided.

This issue is planned to be fixed in Vivado 2018.3.


Associated Attachments

Name File Size File Type
rd_eye.c 7 KB C
rd_eye_2017.2.c 6 KB C

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
69698 SDK 2017.1 - Release Notes and Known Issues N/A N/A
69699 SDK 2017.2 - Release Notes and Known Issues N/A N/A
AR# 69298
Date 07/24/2018
Status Active
Type Known Issues