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  3. AR# 69764: 2017.1/2017.3 Zynq UltraScale+ MPSoC: Linux boot hangs at PLL shutdown

AR# 69764

2017.1/2017.3 Zynq UltraScale+ MPSoC: Linux boot hangs at PLL shutdown

Description

Linux boot hangs at the PLL shutdown on Zynq UltraScale+ MPSoC devices.

[ 3.133438] usbcore: registered new interface driver usbhid
[ 3.138936] usbhid: USB HID core driver
[ 3.148792] fpga_manager fpga0: Xilinx ZynqMP FPGA Manager registered
[ 3.160894] xilinx-dp-snd-pcm amba:dp_snd_pcm0: Xilinx DisplayPort Sound PCM probed
[ 3.168526] xilinx-dp-snd-pcm amba:dp_snd_pcm1: Xilinx DisplayPort Sound PCM probed
[ 3.176567] PLL: shutdown

Solution

This occurs when a VPLL output clock is shared with multiple peripherals, especially DP_VIDEO and TOPSW_MAIN in a Vivado design.

To resolve this issue, set TOPSW_MAIN to DPLL and DP_VIDEO to VPLL.

Note: VPLL should be used only for Display Port (DP_VIDEO)

AR# 69764
Date 10/06/2017
Status Active
Type General Article
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