What should I do with mode pins during FPGA JTAG configuration?
For Spartan/XL or XC4000/E/XL/XV devices:
/INIT should be pulled low upon power up for JTAG configuration. With /INIT low, the values on the mode pins will not be considered,
and can therefore be left hanging.
For Virtex/E/II or Spartan-II devices:
Configuration through the boundary-scan port is always available, and it is independent of the mode selection. Selecting the boundary-scan mode simply turns off the other modes.