AR# 69931

LogiCORE IP MIPI D-PHY v3.1 (Rev. 1) - When using MIPI D-PHY TX, why is the HS-PREPARE length violating MIPI D-PHY specification version 1.1?

Description

When implementing the MIPI D-PHY v3.1 IP (Rev. 1) (Transmitter side) for 7 Series with the OBUFTDS option enabled, why do we observe that the HS-PREPARE length can violate the MIPI D-PHY specification rev1.1?

For example:

The MIPI D-PHY 4lane@600Mbps with the OBUFTDS option enabled will have HS_PREPARE of approximately 150ns. (out-of-spec)

(According to the MIPI D-PHY specification, the HS_PREPARE max value is 85ns+6UI)

This issue occurs in the MIPI D-PHY (Transmitter side) for 7 Series generated from:

  • Vivado 2017.1 - LogiCORE IP MIPI D-PHY v3.1
  • Vivado 2017.2 - LogiCORE IP MIPI D-PHY v3.1 (Rev. 1)

Solution

This issue occurs in the MIPI D-PHY for 7 Series, but only when generated with the OBUFTDS option enabled for the MIPI D-PHY TX configuration.

  • Vivado 2017.1 - Users should update to Vivado 2017.4 (On its release) or later.
  • Vivado 2017.2 - Users can download the MIPI D-PHY patch from (Xilinx Answer 69760) to work around this issue.
  • Vivado 2017.3 - Users should update to Vivado 2017.4 (On its release) or later.
  • Vivado 2017.4 - This issue will be resolved in the MIPI D-PHY in Vivado 2017.4 and later.

Users should update to the latest version of the IP.

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AR# 69931
Date 04/24/2018
Status Active
Type General Article
Devices More Less
Tools
IP