AR# 70111

Vivado 2017.3 - [Opt 31-67] Problem: A LUT2 cell in the design is missing a connection on input pin I0

Description

Migrating a Vivado design from 2017.2 to 2017.3 results in the following error:

[Opt 31-67] Problem: A LUT2 cell in the design is missing a connection on input pin I0, which is used by the LUT equation. This pin has either been left unconnected in the design or the connection was removed due to the trimming of unused logic. The LUT cell name is: logic_[0]_i_1.

There have been no design changes, and the LUT in question looks to have a valid driver. How can I avoid this error?

Solution

The error is a result of Vivado attempting to push a LUT1 inverter into upstream logic, but not successfully re-connecting it.

To work around the issue, set a DONT_TOUCH property on the LUT1 driving the LUT mentioned in the error. This can be found from an open synthesized design.

set_property DONT_TOUCH true [get_cells <lut1_name>]

This issue will be resolved in the 2017.4 release of Vivado.

AR# 70111
Date 11/22/2017
Status Active
Type General Article
Tools