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  3. AR# 7017: WebPACK - Can I use a VHDL or Verilog source file, or is the tool ABEL-based?

AR# 7017

WebPACK - Can I use a VHDL or Verilog source file, or is the tool ABEL-based?

Description

Can I use a VHDL or Verilog source file, or is the tool ABEL-based?

Solution

WebPACK 10 and earlier supports synthesis in three HDL formats: ABEL, VHDL, and Verilog.  

 

WebPACK 11 and Later supports Verilog and VHDL synthesis.

AR# 7017
Date 05/14/2014
Status Archive
Type General Article