UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!
  1. Xilinx - Adaptable. Intelligent.
  2. Support
  3. AR# 7017: WebPACK - Can I use a VHDL or Verilog source file, or is the tool ABEL-based?

AR# 7017

WebPACK - Can I use a VHDL or Verilog source file, or is the tool ABEL-based?

Description

Can I use a VHDL or Verilog source file, or is the tool ABEL-based?

Solution

WebPACK 10 and earlier supports synthesis in three HDL formats: ABEL, VHDL, and Verilog.  

 

WebPACK 11 and Later supports Verilog and VHDL synthesis.

AR# 7017
Date 05/14/2014
Status Archive
Type General Article
Page Bookmarked