AR# 70294

DisplayPort 1.4 RX Subsystem - Release Notes and Known Issues for Vivado 2018.1 and newer tool versions


This answer record contains the Release Notes and Known Issues for the DisplayPort 1.4 RX Subsystem and includes the following:

  • General Information
  • Known and Resolved Issues
  • Revision History

DisplayPort 1.4 RX Subsystem Page:


General Information

Supported Devices can be found in the following three locations:

For a list of new features and added device support for all versions:
  • Subsystem or IP - See the Changelog included with the core in Vivado.
  • Subsystem or IP - Click on the Changelog links below.
  • Standalone Software Drivers - See the Changelog included with the Doxygen Drivers in Xilinx SDK
  • Standalone Software Drivers - GitHub Software Driver Repo


Please seek technical support via the Video Board of the Xilinx Community Forums.

The Xilinx Forums are great resource for technical support.

The entire Xilinx User Community is available to help here, and you can ask questions and collaborate with Xilinx experts to get the solutions you need.

Version Table

This table correlates the core version to the first Vivado design tools release version in which it was included.

Table 1: Version

Core VersionVivado Tools VersionSubsystem Changelog
v2.1 (Rev. 1)2019.2
v2.12019.1(Xilinx Answer 72242)
v2.02018.3(Xilinx Answer 71806)
v1.0 (Rev. 1)
2018.2(Xilinx Answer 71212)
v1.02018.1(Xilinx Answer 70699)

General Guidance

The table below provides Answer Records for general guidance when using the DisplayPort 1.4 RX Subsystem.

Table 2: General Guidance

Article NumberArticle Title
(Xilinx Answer 72188)2018.3 - ZCU102 Example Design Application fails to build in SDK with "undefined reference" errors
(Xilinx Answer 71773)Does the DisplayPort Subsystems IPs support active or passive adaptors to HDMI, DVI or VGA?
(Xilinx Answer 71499)What video resolutions are supported by the IP and can the IP support custom resolutions?
(Xilinx Answer 71373)What clock needs to be used as GT reference clock?
(Xilinx Answer 71085)
2018.1 - KCU105 Example design - Why is a license required for a Video AXI4S Remapper IP and how can I found this license?
(Xilinx Answer 66741)HDCP 2.2 - HDCP1.x - Do I need to have both the HDCP 1.x and HDCP 2.2 cores, or is HDCP 2.2 backward compatible with HDCP 1.x?

Known and Resolved Issues

The following table provides known issues for the DisplayPort 1.4 RX Subsystem, starting with v1.0, initially released in Vivado 2018.1.

Note: The "Version Found" column lists the version the problem was first discovered.

The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.

Table 3: IP

Article NumberArticle TitleVersion FoundVersion Resolved

Table 4: Software Driver
Article NumberArticle TitleVersion FoundVersion Resolved
(Xilinx Answer 72476)
Why does the core fails to train at 8.1 Gbps on GTYE4 when DOWNSPREAD is enabled?v2.0N/A

Revision History:
10/18/2019Added (Xilinx Answer 66741) to General Guidance and v2.1 (Rev. 1) to Version table
06/24/2019Added (Xilinx Answer 72242) to the revision table and (Xilinx Answer 72476) to the known issues
04/05/2019Added (Xilinx Answer 72188) to General Guidance
11/30/2018Added v1.0 (Rev. 1) and v2.0 to Version table and (Xilinx Answer 71773) to General Guidance
08/30/2018Added (Xilinx Answer 71499) to General Guidance
07/26/2018Added (Xilinx Answer 71373) to General Guidance and v1.0 (Rev. 1) to Version Table
05/01/2018Added (Xilinx Answer 71085) to General Guidance
04/16/2018Initial Release

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
56852 Xilinx Multimedia, Video and Imaging Solution Center - Top Issues N/A N/A

Child Answer Records

AR# 70294
Date 10/24/2019
Status Active
Type Release Notes