General Description: By default, for all families except Virtex/E, FPGA Express will attempt to merge registers into IOBs whenever possible. This behavior can be controlled in the Express Constraints Editor under the Ports tab by modifying the value under the column heading "Use I/O Reg".
Setting the default value to TRUE does not work for Virtex/E designs.
This functionality can be achieved on a global level by setting the -pr option in MAP. Set this to "I" for inputs, "O" for outputs, or "B" for both inputs and outputs. This option can be set in the Implementation options GUI.
Setting the default "Use I/O Reg" value to TRUE does not work, but setting this value on individual ports does. Set Use I/O Reg to TRUE for each port that should have a flip flop merged into it. This will not, however, work for tri-state enable flip flops.