You are using a deprecated Browser. Internet Explorer is no longer supported by Xilinx.
LogiCORE UHD-SDI GT - Why does the UHD-SDI GT wrapper fail to implement when selecting a multi-link configuration?
Why does the UHD-SDI GT wrapper fail to implement when selecting a multi-link configuration?
When instantiating a UHD-SDI _GT and selecting 2 for UHD-SDI GT Links, a second design_1_uhdsdi_gt_0_0_top instance is never instantiated.
This is shown in the screenshot below.
This is a known issue that occurs when a users tries to implement the multi-link configuration of the UHD-SDI GT Core.
This issue has been fixed in Vivado 2018.2 and later.
- Vivado 2018.1 - Users can download the UHD-SDI GT patch from (Xilinx Answer 70974) to work around this issue.
- Vivado 2018.2 - This issue is resolved in the UHD-SDI GT IP in Vivado 2018.2 and later.
Note: For an existing design, the output products of the IP need to be reset after applying the patch.
Xilinx recommends updating to the latest version of the IP.
Was this Answer Record helpful?
Linked Answer Records
Master Answer Records
Associated Answer Records