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AR# 71349

Zynq UltraScale+ MPSoC - PS Gigabit Ethernet MAC (GEM) Controller - Release Notes and Known Issues Master Article

Description

This master Answer Record has listed all known issues of Gigabit Ethernet MAC (GEM) Controller in PS on MPSoC devices.

Solution

General Information

On Zynq MPSOC devices, we have 4 GEMs in PS which are getting more and more popular and used by customers in order to save PL resources for Ethernet communication. 

We provide MACB Linux driver and EMACPS standalone driver for this hard IP. 

The supported features for each driver are listed on wiki page:

http://www.wiki.xilinx.com/Macb+Driver

http://www.wiki.xilinx.com/Standalone+Ethernet+Driver


Hardware Support:

Answer Record NumberAnswer Record TitleVersion FoundVersion Resolved
(Xilinx Answer 71299)Zynq UltraScale+ MPSoC - GEM TSU timer does not increment as expected 2016.4See Answer Record
(Xilinx Answer 69490)Zynq UltraScale+ MPSoC - Gigabit Ethernet Controller (GEM) - More clarification is needed on the External FIFO InterfaceN/AN/A
(Xilinx Answer 69488)Zynq UltraScale+ MPSoC - (UG1085) - Gigabit Ethernet Controller (GEM) external FIFO interface is 8-bit2017.2See Answer Record
(Xilinx Answer 69094)Zynq UltraScale+ MPSoC - PS GEM configuration requires gem_tsu_inc_ctrl[1:0] in MIO for TSU modes2016.42017.2
(Xilinx Answer 68605)Zynq UltraScale+ MPSoC - What PHY devices are tested with the Zynq MPSoC GEM controller?N/AN/A
(Xilinx Answer 68546)Zynq UltraScale+ MPSoC - GEM - Incorrect Transmission of Pause Frames In Response To Reception Of Pause Frames With Unicast or Known Multicast AddressSee Answer RecordSee Answer Record
(Xilinx Answer 67239)Zynq UltraScale+ MPSoC - Gigabit Ethernet MAC TSU Interface and PTP support See Answer RecordSee Answer Record
(Xilinx Answer 66592)Zynq UltraScale+ MPSoC - SGMII using PS-GTRSee Answer RecordSee Answer Record

Linux:

Answer Record NumberAnswer Record TitleVersion FoundVersion Resolved
(Xilinx Answer 71295)2017.3 XAPP1305 - 1G PS EMIO Ethernet/PS EMIO SGMII reference designs need patch2017.3See Answer Record
(Xilinx Answer 71168)Zynq UltraScale+ MPSoC - PS GEM Flow Control limitation 2018.1See Answer Record
(Xilinx Answer 69769)PetaLinux - Zynq MPSoC PS-GTR SGMII - fixed link support patch2017.xSee Answer Record
(Xilinx Answer 69132)2017.1-2017.4 Zynq UltraScale+ MPSoC - Linux MACB MDIO support for single MAC managing multiple PHYs 2017.42018.3
(Xilinx Answer 68409)Zynq UltraScale+ MPSoC - 2016.4 Linux support for GEM 100BT and 10BT2016.4See Answer Record
(Xilinx Answer 67930)2016.2 PetaLinux - Zynq UltraScale+ MPSoC GEM Clock Control needs to set for EMIO clock for RX2016.2See Answer Record
(Xilinx Answer 67923)2016.2 PetaLinux - Zynq UltraScale+ MPSoC GMII2RGMII on MACB driver2016.2See Answer Record
 
 
Baremetal:

 

Uboot:

Answer Recode NumberAnswer Record TitleVersion FoundVersion Resolved
(Xilinx Answer 68392)Zynq UltraScale+ MPSoC: 2016.4 U-Boot support for GEM 100BT and 10BT2016.42017.1


Note: The "version found" column lists the version the problem was first discovered.

The problem may also exists in earlier versions, but no specific testing has been performed to verify earlier versions.

AR# 71349
Date 07/30/2018
Status Active
Type Known Issues
Devices
Tools
IP
Boards & Kits
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