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AR# 7155

8.1i Floorplanner - Misaligned BUFT output signals at RXXCXX


Keywords: misalign, 2.1i, 3.1i, 6.1i, 7.1i, signal

When I use Floorplanner to open a planned 2V1000 design and select Floorplan --> Check Floorplan, a series of errors and warnings occur:

"Misaligned BUFT output signals at RXXCXX.
Placement of RPM DATA_PATH1.fsb_data_path1.data_protocol_e1.wr_count_cry[0] does not correspond with its RLOC parameters.
Placement of RPM DATA_PATH1.ib_ob_data_path1.in_order_q_ctrl1.fsb_wr_seq_counter_0] does not correspond with its RLOC parameters."

If I then zoom out, select my entire design, zoom into an IOB, select the IOB, move it, place it back in its original position, and select "Recheck" in the Check Floorplan Warnings window, the only remaining error is:

"Misaligned BUFT output signals at R64C*.1"

Why do the other warnings and errors disappear after I shift the floorplanned design?


This issue will be fixed in the next major software release
AR# 7155
Date 06/17/2008
Status Archive
Type General Article