This answer record contains the Release Notes and Known Issues for the Radio over Ethernet (RoE) Framer LogiCORE IP and includes the following:
This Release Notes and Known Issues Answer Record is for the core generated in Vivado 2018.3 and newer tool versions.
Please seek technical support via the Networking Connectivity Board. The Xilinx Forums are a great resource for technical support.
The entire Xilinx Community is available to help here, and you can ask questions and collaborate with Xilinx experts to get the solutions you need.
Supported devices can be found in the following three locations:
ZCU102, ZCU111 are supported in hardware demostration Designs.
Board BSP, Linux driver and software applications are available onvhttps://github.com/Xilinx/wireless-apps
This table correlates the core version to the first Vivado design tools release version in which it was included.
|RoE IP Version||Vivado Version||Vivado IP Change Log|
|v3.0||2020.1||(Xilinx Answer 73626)|
|v2.1||2019.2||(Xilinx Answer 72923)|
|v2.0||2019.1||(Xilinx Answer 72242)|
|v1.0||2018.3||(Xilinx Answer 71806)|
The table below provides Answer Records for general guidance when using the Radio over Ethernet Framer
|Article Number||Article Title|
|(Xilinx Answer 72466)||How to generate a simulation example design that contains both 10G/25G High Speed Ethernet Subsystem and the RoE Framer?|
Known and Resolved Issues:
|Answer Record||Title||Version Found||Version Resolved|
|(Xilinx Answer 73556)||Why the Ethernet Packet Size is larger than "Maximum length of Ethernet Packets" setting in IP GUI?||v2.1||v3.0|
|(Xilinx Answer 72429)||Radio over Ethernet Framer v2.0 - The production status in Vivado 2019.1 is incorrect||v2.0||v2.1|
|04/01/2020||Added (Xilinx Answer 73556)|
|07/12/2019||Added (Xilinx Answer 72466)|
|06/05/2019||Added (Xilinx Answer 72429)|