AR# 71994

Description

Version Found: UltraScale+ PCI Express Integrated Block v1.3 (Rev. 4) - (Vivado 2018.3)

Version Resolved and other Known Issues: (Xilinx Answer 65751)

(PG213) states that Tandem is not supported with RFSoC devices in Table 3-1 as seen below:

"Zynq RFSoC devices do not have MCAP-enabled PCIe block locations.

These devices are not supported for Tandem Configuration.

If support is enabled in a future release, it would be for the Tandem PROM solution only."

In Vivado 2018.3, Tandem PROM can be enabled using the UltraScale+ PCI Express Integrated Block when the core is in Advanced Mode as seen below:

Is Tandem PROM supported in RFSoC Devices in Vivado 2018.3?

Solution

Support for Tandem PROM was added in Vivado 2018.3 for the UltraScale+ PCI Express Integrated Block. 

(PG213) Table 3-1 was not updated to include this support.

The Product Guide will be updated to reflect the correct support in the next release of the documentation.

It will read as follows:

1. Only production silicon is officially supported. Bitstream generation is disabled for all engineering sample silicon (ES1,ES2) devices.
2. Zynq RFSoC devices do not have MCAP-enabled PCIe block locations. These devices are therefore supported for Tandem PROM only.

Note: Tandem PROM is not currently supported in RFSoC devices in the UltraScale+ DMA/Bridge IP (both Bridge and DMA mode)

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