AR# 72237


SDAccel 2019.x - Known Issues


This answer record details the known issues related to SDAccel for the 2019.x releases.


2019.1 Known Issues:

(Xilinx Answer 72343)2019.1 SDAccel - Profile Summary and Timeline Trace output file names
(Xilinx Answer 72345)2019.1 SDAccel - needed by not found
(Xilinx Answer 72346)2019.1 SDAccel - ERROR: Buffer is allocated in wrong memory bank
(Xilinx Answer 72347)2019.1 SDAccel - ERROR: [CFGEN 83-2293] --sp tag applied with an invalid sp tag: bank1
(Xilinx Answer 72611)2019.1 SDAccel - locale::facet::_S_create_c_locale name not valid

Xilinx Forums:

Please seek technical support via the SDAccel Board. The Xilinx Forums are a great resource for technical support. 

The entire Xilinx Community is available to help here, and you can ask questions and collaborate with Xilinx experts to get the solutions you need.

AR# 72237
Date 08/22/2019
Status Active
Type Known Issues
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