When using the LogiCORE Sensor Demosaic v1.0 IP on UltraScale/UltraScale+ architecture with "Use UltraRAM for Line Buffers" enabled I see visual artifacts.
What is the reason for this issue?
This is a known issue with the HLS synthesis tool which generates the RTL for the LogiCORE Sensor Demosaic v1.0 IP.
It is generating incorrect RTL when using UltraRAM.
This issue is resolved in Vivado 2018.2.