AR# 73277

Design Advisory for Zynq UltraScale+ MPSoC/RFSoC: 2018.x-2019.1 XilSKey resets the PS System Monitor configuration

Description

In the 2019.1 release (and previous releases) XilSKey resets the PS System Monitor configuration, over-writing any applied non-default configuration settings.

As a result, applications that are dependent on a non-default PS System Monitor configuration might not work properly after XilSKey is executed.

This includes systems using the PS SYSMON for background monitoring, as channel alarms might be disabled or limits might be changed.


In the case of a standalone example (running on RPU or APU) directly using XilSkey, the reset of the PS SYSMON happens when a read or write access to the eFUSE is performed.

In systems where the PMUFW is present and EFUSE_ACCESS is defined, the reset of the PS SYSMON happens when the PM_EFUSE_ACCESS (53U) API call is performed.


Note: this issue does not apply to the PL System Monitor because the XilSKey library does not interface with the PL System Monitor.


For more information on how to sign up to receive notifications for new Design Advisories, see (Xilinx Answer 18683).

Solution

As a work-around for this behavior, the 2019.2 XilSkey has a compile time macro (XSK_OVERRIDE_SYSMON_CFG) which is set to TRUE by default. 

Users can disable the reset and overwriting of the PS SYSMON configuration by setting this compile time macro to FALSE.

When XSK_OVERRIDE_SYSMON_CFG is FALSE, the 2019.2 version of XilSKey will make sure that the PS SYSMON configuration is suitable for its operations and return an error if not.

A patch for the 2019.1 version is attached to this Answer Record.

Attachments

Associated Attachments

Name File Size File Type
AR73277_sdk_2019_1_preliminary_rev1.zip 809 KB ZIP
AR# 73277
Date 02/07/2020
Status Active
Type Design Advisory
Devices
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