AR# 75599


2020.2 QEMU Versal and Zynq UltraScale+ MPSoC - Incorrect dummy cycles sent when using GQSPI dual or quad mode byte transfer instead of CS hold time


When using GQSPI, it is possible to use a byte transfer to send dummy cycles instead of using CS hold time.

QEMU does not emulate link state for GQSPI commands, so if sending 1 byte using quad or dual mode, QEMU will send 1 cycle to flash instead of 2 or 4 respectively.


To work around this issue, use CS hold time for the amount of dummy cycles you need for your command instead of transferring bytes.

AR# 75599
Date 11/24/2020
Status Active
Type Known Issues
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