UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 7660

XPLA2 - Reserving device configuration pins using the fitter

Description

Keywords: XPLA, CoolRunner, XPLA2, fitter, configuration, pins, reserve, I/O

How do I tell the fitter not to assign XPLA2 device configuration pins to I/O signals?

Solution

Most of the pins used in configuration of the device can also be used as I/O; however, this complicates the design of the system or PCB. Therefore, most designers would rather not have the pins involved in the device configuration also assigned as I/O signals in the design.

To inform the fitter of the configuration mode used, you can specify a property either in the ABEL/PHDL source code (Xilinx Answer 7563) or in a control file (Xilinx Answer 7516).

Here is an example of the ABEL/PHDL property for the master serial configuration mode (please note the spacing):

xpla property 'config_master_serial';

The fitter will then assign only the pins involved in the specified configuration mode to I/O signals as a last resort; that is, there are no single-function I/O pins left.
AR# 7660
Date Created 08/21/2007
Last Updated 07/28/2009
Status Archive
Type General Article