AR# 7733: 3.1i Virtex MAP - Error: "...Unable to pack the register xxx because of connectivity restrictions."
AR# 7733
3.1i Virtex MAP - Error: "...Unable to pack the register xxx because of connectivity restrictions."
Description
Keywords: connectivity restrictions, xvkpu, FDRS
Urgency: Standard
General Description: MAP fails to pack two FDRSs with common set/reset nets. (The same pack worked in version 1.5i.)
ERROR:xvkpu - Unable to obey design constraints (MACRONAME = U1/hset, RLOC = R6C0.S1) which require the combination of the following symbols into a single slice:
FLOP symbol "U1/$I887" (Output Signal = &__A__16) FLOP symbol "U1/$I888" (Output Signal = &__A__15) LUT symbol "U1/$I902" (Output Signal = U1/I2) MUXCY symbol "U1/$I743" (Output Signal = U1/$I743/O) MUXCY symbol "U1/$I858" (Output Signal = U1/$I858/O) LUT symbol "U1/$I796" (Output Signal = U1/I3) Unable to pack the register U1/$I888 because of connectivity restrictions.
Solution
The problem is that both flip-flops were driven by non-RLOC'd XORCY components. When combined with the fact that the FFs are using both set and reset, this led MAP to incorrectly assume that there was a conflict over the BY input pin.
The work-around is to add .ucf file constraints to RLOC the XORCYs: