General Description: Although supported by the hardware, MAP does not support the use of an HMAP with three external (to CLB) inputs. (There are no plans to add this support to MAP.) If this is attempted, the following error occurs:
ERROR:x4kma:387 - Unable to obey design constraints that require the combination of the following symbols into a single CLB: HIERCY4_19 symbol "GRAY_ARY/U861/U7/U14" (output signal=GRAY_ARY/U861/U7/C1) HMAP symbol "GRAY_ARY/U861/U7/U24" (output signal=GRAY_ARY/U861/U7/L) DFF symbol "GRAY_ARY/U861/U7/U17" (output signal=GRAY_ARY/U861/A1) FMAP symbol "GRAY_ARY/U861/U7/U21" (output signal=GRAY_ARY/U861/U7/MD1) DFF symbol "GRAY_ARY/U861/U7/U18" (output signal=GRAY_ARY/U861/A0) FMAP symbol "GRAY_ARY/U861/U7/U22" (output signal=GRAY_ARY/U861/U7/MD0) No H function generator combinational inputs are available. These symbols share the same RLOC parameter. Consider using the "-ir" command line switch.
The only work-around available is to create the desired CLB configuration in FPGA Editor, generate a physical macro (.nmc file) from it, and instantiate it into your design.
For more information on creating physical macros, please refer to the Xilinx Manual "EPIC Design Editor Reference/User Guide".