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  3. AR# 7946: 5.1i CORE Generator, VANTAGE, VHDL - "Error: Configuration "cfg_beh" cannot be created because the library already has a configuration with the same name. (util/LBR/58)"

AR# 7946

5.1i CORE Generator, VANTAGE, VHDL - "Error: Configuration "cfg_beh" cannot be created because the library already has a configuration with the same name. (util/LBR/58)"

Description


Urgency: Hot



General Description:

Certain VHDL simulators (such as Viewlogic Vantage) do not allow the compilation of a VHDL configuration of a given name more than once in a library. Because (Xilinx Answer 6250) directs me to specify the VHDL models in the XilinxCoreLib library with wild cards, I encounter a problem when recompiling the same configuration; errors similar to the following are reported:



"VHDL Compiler, Release 6.202

Copyright (c) 1998, Viewlogic Systems, Inc.

Working library XILINXCORELIB "C:\Temp\Test7\xilinxcorelib.lib".

--

Compiling "C:\Temp\Test7\XilinxCoreLib\prims_sim_arch.vhd" line 1...

Compiled entity XILINXCORELIB.C_BUFT

--

Compiling "C:\Temp\Test7\XilinxCoreLib\prims_sim_arch.vhd" line 27...

a.C_BUFT.BEHAVIORAL.c

Compiled architecture XILINXCORELIB.C_BUFT(BEHAVIORAL)

--

Compiling "C:\Temp\Test7\XilinxCoreLib\prims_sim_arch.vhd" line 45...

Compiled configuration XILINXCORELIB.CFG_BEH of C_BUFT(BEHAVIORAL)

--

Compiling "C:\Temp\Test7\XilinxCoreLib\prims_sim_arch.vhd" line 50...

Compiled entity XILINXCORELIB.C_PULLUP

--

Compiling "C:\Temp\Test7\XilinxCoreLib\prims_sim_arch.vhd" line 65...

a.C_PULLUP.BEHAVIORAL.c

Compiled architecture XILINXCORELIB.C_PULLUP(BEHAVIORAL)

--

Compiling "C:\Temp\Test7\XilinxCoreLib\prims_sim_arch.vhd" line 72...

**Error: Cannot create configuration CFG_BEH in library "WORK"

(C:\Temp\Test7\xilinxcorelib.lib)

because configuration with the same name already exists.

(libAccess/127)

The existing configuration is associated with "C_BUFT BEHAVIORAL".

(libAccess/131)

**Error: Unable to create configuration WORK.CFG_BEH of

C_PULLUP(BEHAVIORAL). (compiler/driver/56)

--

5/6 design unit(s) compiled successfully.

Syntax summary: 0 error(s), 0 warning(s) found."



These errors are seen with PULLUP, BUFT and C_LUT models.



As the messages indicate, Vantage does not allow the compilation of configurations with the same name, although this is a perfectly valid task.

Solution

The "cfg_beh" configuration declarations for PULLUP, BUFT, and C_LUT are all located in the prims_sim_arch.vhd file. As they are actually empty declarations, simply deleting them from these models will prevent the errors.

AR# 7946
Date 07/28/2010
Status Archive
Type General Article