AR# 7948: 2.1i 9500/xl Tsim- Timing model incorrect for negative edge triggered global clock signals
AR# 7948
2.1i 9500/xl Tsim- Timing model incorrect for negative edge triggered global clock signals
Description
Keywords: 9500, timing, negative, global clock
Urgency: Standard
General Description: There is an error in the timing model such that the timing for a negative edge triggered flip flop on the global clock net uses the timing for a product-term clock net - thus appearing slower than it really operates. This problem is not seen for positive edge triggered registers.