Description

What is the input clock frequency range for Virtex-E CLKDLLs to be locked?

Solution

For -6 parts: 

Min(Mhz) Max(Mhz) 

CLKDLL: 25 130 

CLKDLLHF: 60 260 

For -7 parts: 

Min(Mhz) Max(Mhz) 

CLKDLL: 25 160 

CLKDLLHF: 60 320