AR# 8061: 3.x FPGA Express - "ERROR:MapLib:32 - LUT2 symbol "name" (output signal=sig_name) has an equation that uses an input pin connected to a trimmed signal"
AR# 8061
3.x FPGA Express - "ERROR:MapLib:32 - LUT2 symbol "name" (output signal=sig_name) has an equation that uses an input pin connected to a trimmed signal"
Description
Keywords: FPGA, Express, MAP, basmm, LUT, trimmed
Urgency: Standard
General Description: FPGA Express reports the following error:
"ERROR:basmm:27x - LUTx symbol "symbol_name" (output signal=signal_name) has an equation that uses an input pin that has no connected signal. Make sure that all the pins used in the equation for this LUT have signals that are connected in your design."
Solution
This problem is commonly seen when ports in lower-level modules are not used with the assumption that the synthesis tool will optimize them out. Generally, the synthesis tool will properly optimize the unused ports out of the design. Occasionally, however, FPGA Express is unable to do this, and this error occurs.
The only known solution is to remove the unused port that is associated with the problem. If you cannot determine which port is causing the problem, you must remove all unused ports.