2. Support
  3. AR# 8315: 2.1i COREGEN, C_IP4: "FATAL: RPM arrangement for a1/RAM_0/BIT_1 cannot be placed in RPM arrangement for a1/RAM_0 due to resource contention." for RAM-Based Shift Register

AR# 8315

2.1i COREGEN, C_IP4: "FATAL: RPM arrangement for a1/RAM_0/BIT_1 cannot be placed in RPM arrangement for a1/RAM_0 due to resource contention." for RAM-Based Shift Register

Description

Keywords: coregen, rpm, ram, based, shift register

Urgency: standard

General Description:
When generating a RAM-Based Shift Register with the following combination of
options:

"Create RPM" = true
"Register Final Bit" = true
"Clock Enable" = true
"Sync Controls Override CE" = true
"synchronous_settings" = anything except "none"
"asynchronous_settings" = anything except "none"

the core will fail in CORE Generator with the following error message:

FATAL: RPM arrangement for a1/RAM_0/BIT_1 cannot be placed in RPM arrangement for a1/RAM_0 due to resource contention.
ERROR: An internal error has occurred. Please call Xilinx support.
FATAL: Cannot place row template arrangement for a1 because resource assignment is not complete.
ERROR: An internal error has occurred. Please call Xilinx support.
WARNING: Core a1 did not generate product ImpNetlist.
Debug: Implementation netlist failed!!
ERROR: Errors encountered while generating a1 (RAM-based_Shift_Register 1.0). No output files have been generated.

Solution

To work around this problem, try disabling the "Create RPM" option. The drawback
is that performance may deteriorate to a certain extent.
AR# 8315
Date 08/24/2001
Status Archive
Type General Article