What is the difference between UCLK, GCLK, PT, and LCT clocks, and when should they be used on the CoolRunner XPLA3 devices?
For a general architecture overview, please see:
GCLK - Global Clocks
There are 4 Global Clocks on the device. They provide a low skew/high speed clock that can be used throughout the device. 2 of the 4 GCLKs go to each Logic Block.
UCLK - Universal Clocks.
There is a possible maximum 1 UCLK on the device. This type of clock is created by an internal Product Terms (PT). One Product Term is taken from each Logic Block and sent to four Multiplexors for use as a universal control term. One of the Multiplexors is dedicated for the UCLK. (See Image below)
NOTE: The fact that the UCLK leaves and is created outside the Logic Block means that is will have a longer delay than the GCLK and PT clocks. Compared to the PT clocks, it is more flexible since it can be shared between macrocells in a Logic Block.
PT Clocks - Product Term Clocks.
There are a maximum of 16 PT Clocks per Logic Block, one per macrocell. These are commonly used and have less delay than the UCLK since they are dedicated to a macrocell and cannot be shared between macrocells.
LCT Clocks - Local Control Term Clocks.
There is a possible total of four LCT Clocks per Logic Block. These clocks can be shared between macrocells within a Logic Block, but not between Logic Blocks.