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Mentor Design Architect/ Xilinx A2.1i: How to use differential I/O specific for Virtex-E (LVDS)
Keywords: LVDS, differential I/O, standards, schematic
I am using Mentor C.2 Design Architect with Xilinx A2.1i SP5, tageting
Virtex-E. How do I use the LVDS differential I/O? I do not see them in
the Virtex library.
In the Xilinx A2.1i software (with any Service Pack) the LVDS
component symbol is not available in the library to put down onto your
Currently you will have to use a User Constraint File (UCF) in order to use
the LVDS I/O standard.
Note: The Xilinx 3.1i software will have these component symbols to put down onto
Please see (Xilinx Solution 8187) for more information on LVDS usage including
a UCF example.
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