We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Page Bookmarked

AR# 8729

5.1i UNISIMS, SIMPRIMS - CLK2X output does not toggle at twice the speed of the CLK0 output. (VHDL, Verilog)


Keywords: ModelSim, DLL, CLK2X, CLK2x, CLK0, simulate, simulation, Virtex

Urgency: Standard

General Description:
ModelSim displays an incorrect simulation result for the CLK2x output of the Virtex DLL. (The CLK0 output appears to be correct.)


To ensure that the DLL CLK2X output is correct, confirm that the ModelSim software is set to simulate in picosecond accuracy, rather than in nanosecond accuracy. (The DLL simulation model is coded in "ps" accuracy, and the simulator will not resolve an accurate result if used in "ns" accuracy mode.)

The accuracy can be changed in the ModelSim "Load Design" window, using the pull-down box. After you have made this change, load the design.

You can also specify the "-t ps" vsim option when you load the design from the command prompt:

vsim -t ps design_name
AR# 8729
Date 10/16/2008
Status Archive
Type General Article