AR# 8733: 3.1i COREGEN: Verilog and VHDL simulation flows
AR# 8733
3.1i COREGEN: Verilog and VHDL simulation flows
Description
Keywords: 3.1i, verilog, vhdl, simulation
Urgency: standard
General Description:
This solution describes the Verilog and VHDL behavioral simulation flows for the 3.1i release. The flows are similar to the 2.1i flows, with a number of enhancements added:
For details on the MTI flow, please refer to (Xilinx Answer # ) For details on the VCS flow, please refer to (Xilinx Answer #) For details on the Verilog-XL flow, please refer to (Xilinx Answer #) For details on the NC-Verilog flow, please refer to (Xilinx Answer #)