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AR# 8913

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FPGA Express 3.3 - How can I target missing Virtex-E and Spartan-II packages?

Description

Keywords: FPGA, Express, Virtex, Virtex-E, CS144, PQ240, FG256

Urgency: Standard

General Description:
How can I target the following Virtex-E and Spartan-II parts after installing all of the patches?

Virtex-E:

V50E CS144
V50E PQ240
V50E FG256
V100E FG256
V200E FG256
V300E FG256
V600E FG676
V600E FG900
V812E BG560
V812E FG900
V1000E FG860
V1000E FG900
V1000E FG1156
V1600E FG860
V1600E FG900
V1600E FG1156
V2000E FG860
V2000E FG1156

Spartan-II:

2S15 TQ144
2S30 TQ144
2S100 TQ144
2S150 FG256
2S200 FG256
2S200 FG456
2S200 PQ208

Solution

1

Virtex-E Solution:

Copy and paste the following into the file, making sure that the new packages are the same font/point style as the packages that are already there:

%XILINX%\synth\lib\VIRTEXE.pts

design "V50ECS144" {
read_only : 1;
fpga_valid_speed_grades : ["-8" "-7" "-6"];
fpga_num_rows : 16 ;
fpga_num_cols : 24 ;
fpga_num_ffs : 1088 ;
fpga_pin_count : 98 ;
}
design "V50EPQ240" {
read_only : 1;
fpga_valid_speed_grades : ["-8" "-7" "-6"];
fpga_num_rows : 16 ;
fpga_num_cols : 24 ;
fpga_num_ffs : 1088 ;
fpga_pin_count : 162 ;
}
design "V50EFG256" {
read_only : 1;
fpga_valid_speed_grades : ["-8" "-7" "-6"];
fpga_num_rows : 16 ;
fpga_num_cols : 24 ;
fpga_num_ffs : 1088 ;
fpga_pin_count : 180 ;
}
design "V100EFG256" {
read_only : 1;
fpga_valid_speed_grades : ["-8" "-7" "-6"];
fpga_num_rows : 20 ;
fpga_num_cols : 30 ;
fpga_num_ffs : 1600 ;
fpga_pin_count : 180 ;
}
design "V200EFG256" {
read_only : 1;
fpga_valid_speed_grades : ["-8" "-7" "-6"];
fpga_num_rows : 28 ;
fpga_num_cols : 42 ;
fpga_num_ffs : 2912 ;
fpga_pin_count : 180 ;
}
design "V300EFG256" {
read_only : 1;
fpga_valid_speed_grades : ["-8" "-7" "-6"];
fpga_num_rows : 32 ;
fpga_num_cols : 48 ;
fpga_num_ffs : 3712 ;
fpga_pin_count : 180 ;
}
design "V600EFG676" {
read_only : 1;
fpga_valid_speed_grades : ["-8" "-7" "-6"];
fpga_num_rows : 48 ;
fpga_num_cols : 72 ;
fpga_num_ffs : 7872 ;
fpga_pin_count : 448 ;
}
design "V600EFG900" {
read_only : 1;
fpga_valid_speed_grades : ["-8" "-7" "-6"];
fpga_num_rows : 48 ;
fpga_num_cols : 72 ;
fpga_num_ffs : 7872 ;
fpga_pin_count : 516 ;
}
design "V812EBG560" {
read_only : 1;
fpga_valid_speed_grades : ["-8" "-7" "-6"];
fpga_num_rows : 56 ;
fpga_num_cols : 84 ;
fpga_num_ffs : 19824 ;
fpga_pin_count : 408 ;
}
design "V812EFG900" {
read_only : 1;
fpga_valid_speed_grades : ["-8" "-7" "-6"];
fpga_num_rows : 56 ;
fpga_num_cols : 84 ;
fpga_num_ffs : 19824 ;
fpga_pin_count : 560 ;
}

design "V1000EFG860" {
read_only : 1;
fpga_valid_speed_grades : ["-8" "-7" "-6"];
fpga_num_rows : 64 ;
fpga_num_cols : 96 ;
fpga_num_ffs : 13568 ;
fpga_pin_count : 664 ;
}
design "V1000EFG900" {
read_only : 1;
fpga_valid_speed_grades : ["-8" "-7" "-6"];
fpga_num_rows : 64 ;
fpga_num_cols : 96 ;
fpga_num_ffs : 13568 ;
fpga_pin_count : 664 ;
}
design "V1000EFG1156" {
read_only : 1;
fpga_valid_speed_grades : ["-8" "-7" "-6"];
fpga_num_rows : 64 ;
fpga_num_cols : 96 ;
fpga_num_ffs : 13568 ;
fpga_pin_count : 664 ;
}
design "V1600EFG860" {
read_only : 1;
fpga_valid_speed_grades : ["-8" "-7" "-6"];
fpga_num_rows : 0 ;
fpga_num_cols : 0 ;
fpga_pin_count : 664 ;
}
design "V1600EFG900" {
read_only : 1;
fpga_valid_speed_grades : ["-8" "-7" "-6"];
fpga_num_rows : 0 ;
fpga_num_cols : 0 ;
fpga_pin_count : 704 ;
}
design "V1600EFG1156" {
read_only : 1;
fpga_valid_speed_grades : ["-8" "-7" "-6"];
fpga_num_rows : 0 ;
fpga_num_cols : 0 ;
fpga_pin_count : 728 ;
}
design "V2000EFG860" {
read_only : 1;
fpga_valid_speed_grades : ["-8" "-7" "-6"];
fpga_num_rows : 80 ;
fpga_num_cols : 120 ;
fpga_num_ffs : 20800 ;
fpga_pin_count : 664 ;
}
design "V2000EFG1156" {
read_only : 1;
fpga_valid_speed_grades : ["-8" "-7" "-6"];
fpga_num_rows : 80 ;
fpga_num_cols : 120 ;
fpga_num_ffs : 20800 ;
fpga_pin_count : 808 ;
}

2

Spartan-II Solution:

Copy and paste the following into the file, making sure that the new packages are the same font/point style as the packages that are already there:

%XILINX%\synth\lib\SPARTAN2.pts

design "2S15TQ144" {
read_only : 1;
fpga_valid_speed_grades : ["-6" "-5"];
fpga_num_rows : 8 ;
fpga_num_cols : 12 ;
fpga_num_ffs : 528 ;
fpga_pin_count : 90 ;
}
design "2S30TQ144" {
read_only : 1;
fpga_valid_speed_grades : ["-6" "-5"];
fpga_num_rows : 12 ;
fpga_num_cols : 18 ;
fpga_num_ffs : 1080 ;
fpga_pin_count : 96 ;
}
design "2S50TQ144" {
read_only : 1;
fpga_valid_speed_grades : ["-6" "-5"];
fpga_num_rows : 16 ;
fpga_num_cols : 24 ;
fpga_num_ffs : 1824 ;
fpga_pin_count : 96 ;
}
design "2S100TQ144" {
read_only : 1;
fpga_valid_speed_grades : ["-6" "-5"];
fpga_num_rows : 20 ;
fpga_num_cols : 30 ;
fpga_num_ffs : 2760 ;
fpga_pin_count : 96 ;
}
design "2S150FG256" {
read_only : 1;
fpga_valid_speed_grades : ["-6" "-5"];
fpga_num_rows : 24 ;
fpga_num_cols : 36 ;
fpga_num_ffs : 3888 ;
fpga_pin_count : 180 ;
}
design "2S200FG256" {
read_only : 1;
fpga_valid_speed_grades : ["-6" "-5"];
fpga_num_rows : 28 ;
fpga_num_cols : 42 ;
fpga_num_ffs : 5208 ;
fpga_pin_count : 180 ;
}
design "2S200FG456" {
read_only : 1;
fpga_valid_speed_grades : ["-6" "-5"];
fpga_num_rows : 28 ;
fpga_num_cols : 42 ;
fpga_num_ffs : 5208 ;
fpga_pin_count : 288 ;
}
design "2S200PQ208" {
read_only : 1;
fpga_valid_speed_grades : ["-6" "-5"];
fpga_num_rows : 28 ;
fpga_num_cols : 42 ;
fpga_num_ffs : 5208 ;
fpga_pin_count : 144 ;
}

3

Open up F2.1i, and perform the synthesis there as a Virtex device.

Then, open up FPGA Express stand-alone and open the DPMCOMP.TMP.exp file in your project directory. In the Design Sources frame on the left of the screen, highlight the top level/main project file and then click the "Create Implementation" button. Select the same Virtex device in the Setup box, and click "OK".

Once implementation is finished, exit FPGA Express and open Design Manager stand-alone.

Highlight the project and the click the black arrow button at the top left. Now, in the setup box, select the Spartan-II device that you want to target and click "OK".
AR# 8913
Date 08/30/2001
Status Archive
Type General Article
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