We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 8960

XC18V00, JTAG - What do I do with the input pins during JTAG configuration of the PROM (CCLK, RESET)?


General Description: 

When I program an XC18V00-series PROM in JTAG mode, what should I do with other inputs to the PROM, such as CLK and RESET?


No special process needs to be followed regarding inputs; when the PROM is configured, all input pins are ignored.

AR# 8960
Date 05/14/2014
Status Archive
Type General Article
Page Bookmarked