We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 8962

PROM XC18V00 JTAG - What are the states of the outputs during JTAG configuration of the PROM?


Keywords : 1800, 18V00, JTAG, outputs, state, configuration, PROM 


Urgency : Standard 


General Description :  

When programming an XC18V00 PROM in JTAG mode, what are the states of the outputs?


The outputs are all tri-stated or held at clamp levels during in-system programming.

AR# 8962
Date 05/14/2014
Status Archive
Type General Article
Page Bookmarked