We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 9093

LogiCORE Reed Solomon Decoder - Clarification of processing delay specification



For a certain combination of parameter selections, including
Symbols per Block(n) = 164, the Reed Solomon Decoder
generator reports a Latency = 391 and Processing Delay = 221,
followed by a message indicating that the Processing Delay
"must be less than 165 for continuous code blocks"

What does this mean?

(The complete set of parameters were as follows:

Symbol Width = 8
Field Polynomial = 285
Generator Start = 0
Data Symbols(k) = 152
Symbols Per Block(n) = 164
Synchronization Mode = Start Pulse
Optional Pins = Clock Enable, Synchronous Reset, Erase
Clock Period Per Symbol = 1 )


The interpretation of these messages from the generator is as follows:

The symbols within a code word or block (the 164 symbols for this example) can be input
continuously. However, between successive code words or blocks, you must leave
a gap of 221-164 = 57 symbol periods before the next block may be started. If the
processing delay is less than or equal to 164, then no gap is needed.

The processing delay can be reduced by increasing the number of clock periods per
symbol, or by increasing k, the number of information symbols per code word.

AR# 9093
Date 05/13/2009
Status Archive
Type General Article