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  1. Xilinx - All Programmable
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  3. AR# 9357: 3.1i Virtex FPGA Editor - Adding a pin to GLOBAL_LOGIC signal leads to crash.

AR# 9357

3.1i Virtex FPGA Editor - Adding a pin to GLOBAL_LOGIC signal leads to crash.

Description

Keywords: FPGA Editor, fpga_editor, add, pin, PWR, GND

Urgency: Standard

General Description:
After adding a pin to GLOBAL_LOGIC net, the tool crashes.

Solution

This change is available in the latest 3.1i Service Pack available at:
http://support.xilinx.com/support/techsup/sw_updates/
AR# 9357
Date 08/15/2002
Status Archive
Type General Article