AR# 9658: 3.1i CPLD TAEngine - Fails to expand wild cards [*] when processing timing constraints
AR# 9658
3.1i CPLD TAEngine - Fails to expand wild cards [*] when processing timing constraints
Description
Keywords: CPLD, bus expansion, timing, TAEngine
Urgency: Standard
General Description: Wild cards are not expanded properly when processing timing constraints. This results in timing constraints that are denoted as N/A in the Post-Layout Timing Report.