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AR# 9744

5.1i XST - "ERROR:Xst:785 - file_name.vhd (Line #). Type must be constraint for this object: 'port_name'."

Description

Keywords: vector, constrained, unconstrained, std_logic_vector, VHDL, 3.1i

Urgency: Standard

General Description:
I have an unconstrained vector in VHDL (port_name : in std_logic_vector), and I am seeing the following error message:

"ERROR:Xst:785 - file_name.vhd (Line #). Type must be constraint for this object: 'port_name'."

Solution

Unconstrained vectors in VHDL are not currently supported in XST.

This problem is fixed in version 5.1i of the software.
AR# 9744
Date Created 08/31/2007
Last Updated 10/20/2005
Status Archive
Type General Article