AR# 9755: VSS - How do I compile Xilinx Simulation Libraries for VSS?
VSS - How do I compile Xilinx Simulation Libraries for VSS?
Keywords: Synopsys, VSS, VHDLAN, VHDLSIM, simulation, how
General Description: How do I compile Xilinx simulation libraries in Synopsys VSS?
Manually compiling the libraries:
VSS is Synopsys' VHDL simulator, and it uses pre-compiled libraries for simulation. Xilinx provides compiled simulation libraries for VSS, which can be found at: $XILINX/synopsys/libraries/sim/.
VSS uses the .synopsys_vss.setup file for environment and library settings. An example of this file is provided in the $XILINX/synopsys/examples directory. Pointers to the simulation libraries must be modified to reflect their actual location.
The following procedure illustrates how to compile the Xilinx simulation libraries:
LogiBLOX: The LogiBLOX library is used for designs containing LogiBLOX components during pre-synthesis (RTL) and post-synthesis simulation.
- Add the following line to the .synopsys_vss.setup file: LOGIBLOX : /path_to_directory/logiblox
- Create the physical directory as follows: mkdir /path_to_directory/logiblox