General Description: When a design is synthesized using XST, an NCF file is always generated. If the synthesis tool is then changed to FPGA Express and the design is resynthesized, a new EDIF file is generated. By default, a new NCF is not generated. If a new NCF is not generated, then NGDBUILD will utilize the FPGA Express EDIF file and the XST NCF file, resulting in errors.