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AR# 9947

3.1i PAR - ERROR:DesignRules:355 - Chipcheck: Illegal IO placement. IO bank 5 contains IOs which require a VREF signal...

Description

Keywords: PAR, DesignRules:355, Chipcheck, Illegal, Vref,

Urgency: Standard

Problem Description:
On some occasions, 3.1i PAR places components in reserved sites
resulting in the following DRC ERRORs:

ERROR:DesignRules:355 - Chipcheck: Illegal IO placement. IO bank 5 contains IOs
which require a VREF signal, but Comp a1 is placed on a VREF reserved site R6.
ERROR:DesignRules:462 - Chipcheck: Incompatible IO standards. IO standard
LVCMOS25 of comp a2 and IO standard LVCMOS15 of comp a0 are incompatible.
They cannot be in the same IO bank.

Solution

As a workaround, users can use the Prohibit constraint to prohibit
VREF pins from being used. This problem is scheduled to be fixed
in the 2nd quarterly update to 3.1i, which will also be known as 3.1i
service pack 6. It is due out in late November, 2000.
AR# 9947
Date Created 08/31/2007
Last Updated 10/21/2008
Status Archive
Type General Article