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  3. AR# 9990: 3.1i Virtex Map - In FPGA Express designs, I'm having problems getting I/O registers to pack in IOBs.

AR# 9990

3.1i Virtex Map - In FPGA Express designs, I'm having problems getting I/O registers to pack in IOBs.

Description

Keywords: Express, Flop, Register, I/O, IOB, Pack

Urgency: Standard

Problem Description: Cases have been seen where netlists from
FPGA Express contain IOB=False attributes unbeknownst to the
user. These attributes take precedence over the general map option
to pack registers into IOBs (-pr b).

This attribute setting is the default behavior of Express version 3.4.
It can be changed in the Express constraints editor, under the
"Use I/O Reg" column.

Solution

The 2nd quarterly update to 3.1i, which will also be known as
Service Pack Six, will contain an upgrade to Express 3.5. This
upgrade defaults to a value of "NONE", meaning that no IOB
attribute will be passed to the netlist by default.

The attribute can be overridden in the UCF file using the
following syntax on the register instance name:

INST "inst_name" IOB = TRUE ;
AR# 9990
Date 08/19/2002
Status Archive
Type General Article