Xilinx is now part ofAMDUpdated Privacy Policy

UltraScale and UltraScale+ GTY Transceivers

Getting StartedDesign ResourcesSupport ResourcesTransceiver IP Resources

Refer to the High Speed Serial Product Page for more information on Xilinx GTY Transceivers.

High-Speed Serial I/O Designer's GuideDate
 Basic Concepts 
 Purpose of SERDES 
 History of SERDES 
 Alignment, Encoding, Emphasis, Buffers, Channel Bonding and Clock Correction 
UltraScale GTY Transceivers User GuideDate
 UG578 - RX Byte and Word Alignment09/14/2021
 UG578 - RX 8B/10B Decoder09/14/2021
 UG578 - Buffer Control09/14/2021
 UG578 - RX Clock Correction09/14/2021
 UG578 - RX Channel Bonding09/14/2021
 UG578 - RX Synchronous Gearbox09/14/2021
 UG578 - RX Clock Data Recovery (CDR)09/14/2021

Product Specifications

Product Specifications

UltraScale Transceiver Wizard

UltraScale Transceiver Wizard