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Versal Design Processes Documentation

Xilinx provides a breadth of documentation, resources, and methodologies to accelerate your development on the Versal architecture. If you’re not sure where to begin with Versal ACAPs, the Versal Design Flow Assistant is an interactive guide to help you create a development strategy, while the Design Process Hubs are a visual and streamlined reference to all Versal documentation by design process. For the complete list of Versal training courses, see General Versal Training

Machine Learning and Data Science: Provides guidance for importing a machine learning model from a Caffe or TensorFlow framework onto Vitis AI, then optimize and evaluate its effectiveness.

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Overview ML Inference Training Modules Debug as Necessary Compile the Fixed-Point Model into the Binary Run the Compiled Model with API Code to Deploy Versal TM or Vitis TM Quantize the Floating-Point Model to Fixed-Point Model Optimize the Model for Speed Test and Validate During Runtime Create Custom Platform with DPU Integrate with Accelerator Create the Vitis AI Docker Speed Up Pre and Post Processing with AIE Overview
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