Resource Utilization for QDRII+ SRAM (MIG) v1.4

Vivado Design Suite Release 2019.2

Interpreting the results

This page contains resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.

Data is provided for the following device families:

Kintex UltraScale

Part Information Configuration Parameters Resource Utilization
Device Package Speed Grade Configuration Name
C0.ControllerType
C0.QDRIIP_TimePeriod
C0.QDRIIP_BurstLen
C0.QDRIIP_MemoryPart
C0.QDRIIP_DataWidth
LUTs FFs DSPs 36k BRAMs 18k BRAMs BUFGCE Speedfile Status
xcku040 ffva1156 -3 SN1 QDRIIPLUS_SRAM 1580 4 CY7C2563XV18-633BZXC 18 3350 4085 3 17 0 4 PRODUCTION 1.25 12-04-2018
xcku040 ffva1156 -3 SN2 QDRIIPLUS_SRAM 1580 4 CY7C2563XV18-633BZXC 36 4716 5815 3 17 0 4 PRODUCTION 1.25 12-04-2018

Kintex UltraScale+

Part Information Configuration Parameters Resource Utilization
Device Package Speed Grade Configuration Name
C0.ControllerType
C0.QDRIIP_TimePeriod
C0.QDRIIP_BurstLen
C0.QDRIIP_MemoryPart
C0.QDRIIP_DataWidth
LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcku11p ffva1156 -3 SN5 QDRIIPLUS_SRAM 1580 4 CY7C2563XV18-633BZXC 18 3366 4085 3 17 0 PRODUCTION 1.27 08-13-2019
xcku11p ffva1156 -3 SN6 QDRIIPLUS_SRAM 1580 4 CY7C2563XV18-633BZXC 36 4711 5815 3 17 0 PRODUCTION 1.27 08-13-2019

Virtex UltraScale

Part Information Configuration Parameters Resource Utilization
Device Package Speed Grade Configuration Name
C0.ControllerType
C0.QDRIIP_TimePeriod
C0.QDRIIP_BurstLen
C0.QDRIIP_MemoryPart
C0.QDRIIP_DataWidth
LUTs FFs DSPs 36k BRAMs 18k BRAMs BUFGCE Speedfile Status
xcvu095 ffva2104 -3 SN3 QDRIIPLUS_SRAM 1580 4 CY7C2563XV18-633BZXC 18 3362 4085 3 17 0 4 PRODUCTION 1.26 12-04-2018
xcvu095 ffva2104 -3 SN4 QDRIIPLUS_SRAM 1580 4 CY7C2563XV18-633BZXC 36 4710 5815 3 17 0 4 PRODUCTION 1.26 12-04-2018

Virtex UltraScale+

Part Information Configuration Parameters Resource Utilization
Device Package Speed Grade Configuration Name
C0.ControllerType
C0.QDRIIP_TimePeriod
C0.QDRIIP_BurstLen
C0.QDRIIP_MemoryPart
C0.QDRIIP_DataWidth
LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcvu9p flgb2104 -3 SN7 QDRIIPLUS_SRAM 1580 4 CY7C2563XV18-633BZXC 18 3357 4085 3 17 0 PRODUCTION 1.26 08-13-2019
xcvu9p flgb2104 -3 SN8 QDRIIPLUS_SRAM 1580 4 CY7C2563XV18-633BZXC 36 4717 5815 3 17 0 PRODUCTION 1.26 08-13-2019

Zynq UltraScale+

Part Information Configuration Parameters Resource Utilization
Device Package Speed Grade Configuration Name
C0.ControllerType
C0.QDRIIP_TimePeriod
C0.QDRIIP_BurstLen
C0.QDRIIP_MemoryPart
C0.QDRIIP_DataWidth
LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xczu9eg ffvb1156 -3 SN10 QDRIIPLUS_SRAM 1580 4 CY7C2563XV18-633BZXC 36 4714 5815 3 17 0 PRODUCTION 1.26 08-13-2019
xczu9eg ffvb1156 -3 SN9 QDRIIPLUS_SRAM 1580 4 CY7C2563XV18-633BZXC 18 3363 4085 3 17 0 PRODUCTION 1.26 08-13-2019

COPYRIGHT

Copyright 2019 Xilinx, Inc. Xilinx, the Xilinx logo, Alveo, Artix, ISE, Kintex, Spartan, Versal, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. Arm is a registered trademark of Arm Limited in the EU and other countries. All other trademarks are the property of their respective owners.

LEGAL INFORMATION: PLEASE READ

The information disclosed to you hereunder (the "Materials") is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and (2) Xilinx shall not be liable (whether in contract or tort, including negligence, or under any other theory of liability) for any loss or damage of any kind or nature related to, arising under, or in connection with, the Materials (including your use of the Materials), including for any direct, indirect, special, incidental, or consequential loss or damage (including loss of data, profits, goodwill, or any type of loss or damage suffered as a result of any action brought by a third party) even if such damage or loss was reasonably foreseeable or Xilinx had been advised of the possibility of the same. Xilinx assumes no obligation to correct any errors contained in the Materials or to notify you of updates to the Materials or to product specifications. You may not reproduce, modify, distribute, or publicly display the Materials without prior written consent. Certain products are subject to the terms and conditions of Xilinx's limited warranty, please refer to Xilinx's Terms of Sale which can be viewed at https://www.xilinx.com/legal.htm#tos; IP cores may be subject to warranty and support terms contained in a license issued to you by Xilinx. Xilinx products are not designed or intended to be fail-safe or for use in any application requiring fail-safe performance; you assume sole risk and liability for use of Xilinx products in such critical applications, please refer to Xilinx's Terms of Sale which can be viewed at https://www.xilinx.com/legal.htm#tos.