Resource Utilization for RLDRAM3 (MIG) v1.4

Vivado Design Suite Release 2019.2

Interpreting the results

This page contains resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.

Data is provided for the following device families:

Kintex UltraScale

Part Information Configuration Parameters Resource Utilization
Device Package Speed Grade Configuration Name
C0.ControllerType
C0.RLD3_TimePeriod
C0.RLD3_MemoryPart
C0.RLD3_DataWidth
C0.RLD3_BurstLength
LUTs FFs DSPs 36k BRAMs 18k BRAMs BUFGCE Speedfile Status
xcku040 ffva1156 -3 SN1 RLDRAM3 938 MT44K32M18RB-093 18 4 7622 6770 3 19 2 4 PRODUCTION 1.25 12-04-2018
xcku040 ffva1156 -3 SN2 RLDRAM3 938 MT44K32M18RB-093 36 4 9323 8701 3 22 1 4 PRODUCTION 1.25 12-04-2018
xcku040 ffva1156 -3 SN3 RLDRAM3 938 MT44K16M36RB-093 72 4 12168 12323 3 26 1 4 PRODUCTION 1.25 12-04-2018

Kintex UltraScale+

Part Information Configuration Parameters Resource Utilization
Device Package Speed Grade Configuration Name
C0.ControllerType
C0.RLD3_TimePeriod
C0.RLD3_MemoryPart
C0.RLD3_DataWidth
C0.RLD3_BurstLength
LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcku11p ffva1156 -3 SN7 RLDRAM3 938 MT44K32M18RB-093 18 4 7626 6770 3 19 2 PRODUCTION 1.27 08-13-2019
xcku11p ffva1156 -3 SN8 RLDRAM3 938 MT44K32M18RB-093 36 4 9356 8701 3 22 1 PRODUCTION 1.27 08-13-2019
xcku11p ffva1156 -3 SN9 RLDRAM3 938 MT44K16M36RB-093 72 4 12196 12321 3 26 1 PRODUCTION 1.27 08-13-2019

Virtex UltraScale

Part Information Configuration Parameters Resource Utilization
Device Package Speed Grade Configuration Name
C0.ControllerType
C0.RLD3_TimePeriod
C0.RLD3_MemoryPart
C0.RLD3_DataWidth
C0.RLD3_BurstLength
LUTs FFs DSPs 36k BRAMs 18k BRAMs BUFGCE Speedfile Status
xcvu095 ffva2104 -3 SN4 RLDRAM3 938 MT44K32M18RB-093 18 4 7607 6770 3 19 2 4 PRODUCTION 1.26 12-04-2018
xcvu095 ffva2104 -3 SN5 RLDRAM3 938 MT44K32M18RB-093 36 4 9332 8701 3 22 1 4 PRODUCTION 1.26 12-04-2018
xcvu095 ffva2104 -3 SN6 RLDRAM3 938 MT44K16M36RB-093 72 4 12204 12323 3 26 1 4 PRODUCTION 1.26 12-04-2018

Virtex UltraScale+

Part Information Configuration Parameters Resource Utilization
Device Package Speed Grade Configuration Name
C0.ControllerType
C0.RLD3_TimePeriod
C0.RLD3_MemoryPart
C0.RLD3_DataWidth
C0.RLD3_BurstLength
LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcvu9p flgb2104 -3 SN10 RLDRAM3 938 MT44K32M18RB-093 18 4 7624 6770 3 19 2 PRODUCTION 1.26 08-13-2019
xcvu9p flgb2104 -3 SN11 RLDRAM3 938 MT44K32M18RB-093 36 4 9359 8701 3 22 1 PRODUCTION 1.26 08-13-2019
xcvu9p flgb2104 -3 SN12 RLDRAM3 938 MT44K16M36RB-093 72 4 12191 12321 3 26 1 PRODUCTION 1.26 08-13-2019

Zynq UltraScale+

Part Information Configuration Parameters Resource Utilization
Device Package Speed Grade Configuration Name
C0.ControllerType
C0.RLD3_TimePeriod
C0.RLD3_MemoryPart
C0.RLD3_DataWidth
C0.RLD3_BurstLength
LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xczu9eg ffvb1156 -3 SN13 RLDRAM3 938 MT44K32M18RB-093 18 4 7648 6770 3 19 2 PRODUCTION 1.26 08-13-2019
xczu9eg ffvb1156 -3 SN14 RLDRAM3 938 MT44K32M18RB-093 36 4 9353 8701 3 22 1 PRODUCTION 1.26 08-13-2019
xczu9eg ffvb1156 -3 SN15 RLDRAM3 938 MT44K16M36RB-093 72 4 12192 12321 3 26 1 PRODUCTION 1.26 08-13-2019

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Copyright 2019 Xilinx, Inc. Xilinx, the Xilinx logo, Alveo, Artix, ISE, Kintex, Spartan, Versal, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. Arm is a registered trademark of Arm Limited in the EU and other countries. All other trademarks are the property of their respective owners.

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