Performance and Resource Utilization for Video Frame Buffer Write v1.0

Vivado Design Suite Release 2017.1

Interpreting the results

This page contains maximum frequency and resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.

Zynq UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
SAMPLES_PER_CLOCK
MAX_COLS
MAX_ROWS
MAX_DATA_WIDTH
AXIMM_DATA_WIDTH
HAS_RGBX8
HAS_YUVX8
HAS_YUYV8
HAS_RGBX10
HAS_YUVX10
HAS_Y_UV8
HAS_Y_UV8_420
HAS_RGB8
HAS_YUV8
HAS_Y_UV10
HAS_Y_UV10_420
HAS_Y8
HAS_Y10
MAX_NR_PLANES
Clock Input Fmax (MHz) LUTs FFs LUT-FF Pairs DSP48s 36k BRAMs 18k BRAMs Speedfile Status
xczu9eg ffvb1156 -1 v_frmbuf_wr_08bit__conf_01 1 3840 2160 8 64 1 0 0 0 0 0 0 0 0 0 0 0 0 1 ap_clk 494 1538 2000 892 1 3 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_08bit__conf_02 2 3840 2160 8 128 1 0 0 0 0 0 0 0 0 0 0 0 0 1 ap_clk 494 1877 2667 1197 1 4 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_08bit__conf_03 4 3840 2160 8 256 1 0 0 0 0 0 0 0 0 0 0 0 0 1 ap_clk 519 2540 3959 1734 1 8 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_08bit__conf_04 1 3840 2160 8 64 0 0 1 0 0 0 0 0 0 0 0 0 0 1 ap_clk 513 1584 2101 923 1 3 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_08bit__conf_05 2 3840 2160 8 128 0 0 1 0 0 0 0 0 0 0 0 0 0 1 ap_clk 494 1893 2799 1176 1 4 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_08bit__conf_06 4 3840 2160 8 256 0 0 1 0 0 0 0 0 0 0 0 0 0 1 ap_clk 525 2552 4191 1733 1 8 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_08bit__conf_07 1 3840 2160 8 64 0 0 0 0 0 1 0 0 0 0 0 0 0 2 ap_clk 507 1984 2738 1231 2 5 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_08bit__conf_08 2 3840 2160 8 128 0 0 0 0 0 1 0 0 0 0 0 0 0 2 ap_clk 482 2458 3745 1582 2 6 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_08bit__conf_09 4 3840 2160 8 256 0 0 0 0 0 1 0 0 0 0 0 0 0 2 ap_clk 469 3474 5766 2376 2 12 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_08bit__conf_10 1 3840 2160 8 64 0 0 0 0 0 0 0 1 0 0 0 0 0 1 ap_clk 494 1810 2370 1070 2 3 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_08bit__conf_11 2 3840 2160 8 128 0 0 0 0 0 0 0 1 0 0 0 0 0 1 ap_clk 463 2288 3343 1430 2 4 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_08bit__conf_12 4 3840 2160 8 256 0 0 0 0 0 0 0 1 0 0 0 0 0 1 ap_clk 438 3439 5249 2294 2 8 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_08bit__conf_13 1 3840 2160 8 64 0 0 0 0 0 0 0 0 0 0 0 1 0 1 ap_clk 532 1565 2049 902 1 3 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_08bit__conf_14 2 3840 2160 8 128 0 0 0 0 0 0 0 0 0 0 0 1 0 1 ap_clk 519 1835 2683 1173 1 4 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_08bit__conf_15 4 3840 2160 8 256 0 0 0 0 0 0 0 0 0 0 0 1 0 1 ap_clk 488 2418 3996 1683 1 8 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_08bit__conf_16 1 3840 2160 8 64 1 1 1 0 0 1 1 1 1 0 0 1 0 2 ap_clk 444 2891 3889 1603 3 5 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_08bit__conf_17 2 3840 2160 8 128 1 1 1 0 0 1 1 1 1 0 0 1 0 2 ap_clk 394 4057 5642 2489 3 6 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_08bit__conf_18 4 3840 2160 8 256 1 1 1 0 0 1 1 1 1 0 0 1 0 2 ap_clk 369 6483 9077 3813 3 12 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_19 1 3840 2160 10 64 1 0 0 0 0 0 0 0 0 0 0 0 0 1 ap_clk 507 1531 2000 908 1 3 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_20 2 3840 2160 10 128 1 0 0 0 0 0 0 0 0 0 0 0 0 1 ap_clk 494 1878 2667 1185 1 4 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_21 4 3840 2160 10 256 1 0 0 0 0 0 0 0 0 0 0 0 0 1 ap_clk 519 2548 3959 1756 1 8 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_22 1 3840 2160 10 64 0 0 1 0 0 0 0 0 0 0 0 0 0 1 ap_clk 507 1584 2101 913 1 3 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_23 2 3840 2160 10 128 0 0 1 0 0 0 0 0 0 0 0 0 0 1 ap_clk 532 1892 2799 1159 1 4 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_24 4 3840 2160 10 256 0 0 1 0 0 0 0 0 0 0 0 0 0 1 ap_clk 525 2544 4191 1701 1 8 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_25 1 3840 2160 10 64 0 0 0 1 0 0 0 0 0 0 0 0 0 1 ap_clk 525 1572 2072 915 1 3 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_26 2 3840 2160 10 128 0 0 0 1 0 0 0 0 0 0 0 0 0 1 ap_clk 544 1962 2823 1241 1 4 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_27 4 3840 2160 10 256 0 0 0 1 0 0 0 0 0 0 0 0 0 1 ap_clk 532 2713 4272 1878 1 8 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_28 1 3840 2160 10 64 0 0 0 0 0 1 0 0 0 0 0 0 0 2 ap_clk 550 1982 2738 1189 2 5 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_29 2 3840 2160 10 128 0 0 0 0 0 1 0 0 0 0 0 0 0 2 ap_clk 500 2482 3745 1569 2 6 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_30 4 3840 2160 10 256 0 0 0 0 0 1 0 0 0 0 0 0 0 2 ap_clk 482 3502 5766 2400 2 12 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_31 1 3840 2160 10 64 0 0 0 0 0 0 0 1 0 0 0 0 0 1 ap_clk 469 1814 2370 1059 2 3 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_32 2 3840 2160 10 128 0 0 0 0 0 0 0 1 0 0 0 0 0 1 ap_clk 419 2279 3343 1409 2 4 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_33 4 3840 2160 10 256 0 0 0 0 0 0 0 1 0 0 0 0 0 1 ap_clk 432 3455 5249 2319 2 8 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_34 1 3840 2160 10 64 0 0 0 0 0 0 0 0 0 1 0 0 0 2 ap_clk 525 2009 2958 1227 2 5 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_35 2 3840 2160 10 128 0 0 0 0 0 0 0 0 0 1 0 0 0 2 ap_clk 519 2535 3925 1590 2 6 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_36 4 3840 2160 10 256 0 0 0 0 0 0 0 0 0 1 0 0 0 2 ap_clk 475 3637 5999 2443 2 12 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_37 1 3840 2160 10 64 0 0 0 0 0 0 0 0 0 0 0 1 0 1 ap_clk 519 1565 2049 912 1 3 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_38 2 3840 2160 10 128 0 0 0 0 0 0 0 0 0 0 0 1 0 1 ap_clk 513 1840 2683 1148 1 4 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_39 4 3840 2160 10 256 0 0 0 0 0 0 0 0 0 0 0 1 0 1 ap_clk 482 2426 3996 1673 1 8 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_40 1 3840 2160 10 64 0 0 0 0 0 0 0 0 0 0 0 0 1 1 ap_clk 519 1616 2235 964 1 3 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_41 2 3840 2160 10 128 0 0 0 0 0 0 0 0 0 0 0 0 1 1 ap_clk 513 1907 2855 1210 1 4 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_42 4 3840 2160 10 256 0 0 0 0 0 0 0 0 0 0 0 0 1 1 ap_clk 525 2527 4224 1731 1 8 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_43 1 3840 2160 10 64 1 1 1 1 1 1 1 1 1 1 1 1 1 2 ap_clk 432 3559 4902 1875 3 5 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_44 2 3840 2160 10 128 1 1 1 1 1 1 1 1 1 1 1 1 1 2 ap_clk 369 5428 7085 3075 3 6 0 PRODUCTION 1.09 03-16-2017
xczu9eg ffvb1156 -1 v_frmbuf_wr_10bit__conf_45 4 3840 2160 10 256 1 1 1 1 1 1 1 1 1 1 1 1 1 2 ap_clk 325 8174 11512 4907 3 12 0 PRODUCTION 1.09 03-16-2017

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