ISE
Intellectual Property and Cores Overview
Intellectual Property (IP) refers to preconfigured logic functions optimized for Xilinx® FPGAs. These can include functions delivered through the Xilinx CORE Generator™ software, through the Xilinx Architecture Wizard, as standalone archives, from third parties, or through Xilinx Platform Studio (XPS). Xilinx and its partner companies produce IP ranging in complexity from simple arithmetic operators and delay elements to complex system-level building blocks, such as digital signal processing (DSP) filters, multiplexers, transformers, and memory. The following types of IP are available, which each have a different delivery mechanism and simulation method.
CORE Generator IP
The Xilinx CORE Generator software creates parameterizable versions of pre-defined "soft" IP optimized for Xilinx FPGAs. CORE Generator IP includes memories and FIFOs as well as digital signal processing (DSP), math, standard bus interface, standard logic, and networking functions. For more information, see Working with CORE Generator IP.
Note For details on using the CORE Generator software, see the CORE Generator Help.
Architecture Wizard IP
The Xilinx Architecture Wizard configures FPGA architectural or "hard" features and modules, such as the digital clock managers (DCMs) in Virtex®-II devices or the DSP48 blocks in Virtex-4 devices. The Architecture Wizard can easily create configurations that might otherwise require you to write a large set of constraints or HDL attributes. For more information, see Working with Architecture Wizard IP.
Note For details on Architecture Wizard options, click the More Info buttons in the Architecture Wizard.
Fixed Netlist IP
Fixed netlist IP is already synthesized and netlisted. Both "black box IP cores" delivered by AllianceCORE™ partners and other third-party IP providers are considered fixed netlist IP. Xilinx and several AllianceCORE partners offer Xilinx-specific IP cores through the Xilinx IP Center. In addition, Xilinx provides the peripheral component interconnect (PCI) core and a suite of DSP cores through the Xilinx CORE Generator software. For more information, see Working with Fixed Netlist IP.
Microprocessor and Peripheral IP
Xilinx Platform Studio (XPS), available from the Embedded Development Kit (EDK), allows you to create embedded processor IP for use with both soft and hard embedded processors in Xilinx FPGAs. For example, you can use embedded IP with the PowerPC® embedded hard processor in the Xilinx Virtex-II Pro, Virtex-4, or Virtex-5 FXT FPGAs or with the MicroBlaze™ embedded soft processor in any Xilinx FPGA. For more information, see Working with Microprocessor and Peripheral IP.
Note For more information on Xilinx Platform Studio, including how to purchase it, see the Embedded Development Kit Web page. For more information on the Embedded Development Kit, see the Embedded Development Kit Documentation.
See Also

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