You can create multipliers using FPGA logic with signed or unsigned inputs. Many new architectures contain embedded block multipliers, which are dedicated hardware to perform these functions. Additionally, some devices have multipliers embedded in dedicated DSP blocks.
Supported Devices
Virtex®, Virtex-E, Virtex-II, Virtex-II Pro, Virtex-II Pro X, Virtex-4, Virtex-5, Spartan®-II, Spartan-IIE, Spartan-3, Spartan-3E, Spartan-3A devices
You can create multipliers either by inference or by instantiation. Inputs and outputs can be registered or not registered. Use the constraint MULT_STYLE to indicate the type of multipliers to use during implementation. Use the dedicated multiplier resources when possible to save slice utilization. However, in some cases, LUT-based multipliers may be more suitable depending on the data input width. In general, large multipliers should use the dedicated multiplier blocks (for example, Virtex-II Pro has 18x18 multipliers), because slice-based versions consume more resources.
You can instantiate the component as follows:
  •  For schematic designs, instantiate the Xilinx® Unified Library symbol.
  •  For HDL designs, do either of the following:
    •  Use the instantiation templates provided in the Libraries Guides.
    •  Use the instantiation templates provided with the Project Navigator Language Templates, which are described in Working with Language Templates.
Additional Information
For additional information, see the following resources:
See Also

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