CORE Generator
Advanced Panel - Project Options Dialog Box
Use this dialog box to select advanced options that affect the cores generated within the current project.
  •  Elaboration
    •  Create Netlist Wrapper with IO Pads
      This option adds Input/Output blocks (IOBs) to a core when the CORE Generator™ generates the core and writes out its NGC netlist. The IOB definitions are supplied in an additional output file. Use this file if you want to process the core standalone all the way through place and route to get precise timing and resource utilization information. You can do this without having to interface to any design entry tool.
      If Create Netlist Wrapper with IO Pads is selected, the CORE Generator creates this additional file, a "padded" NGC wrapper file. The padded NGC file contains a declaration of the core as a black box, with the ports connected to appropriate IOBs.
      For a core named corename the NGC describing the core is generated as usual in a file named corename.ngc. The additional file generated when Create Netlist Wrapper with IO Pads is selected is named corename_padded.ngc. The module defined in the file is named corename_padded.
      The corename_padded definition includes a black box instantiation of the core, according to the definition in corename.edn. Each strand of each port on the core is connected to an appropriate IOB. Each IOB is connected to the corresponding port strand on the corename_padded module.
      IOBs are added according to these rules:
      The IOB type connected to a port is shown in the following table:
      Port TypeIOB(s)
      OutputOBUF
      Input Clock (Virtex® derivitives)IBUFG connected to a BUFG
      Input Clock (all other families)BUFG
      All other Input PortsIBUF
      BidirectionalIOBUF
      A clock port is assumed if a port is named clk or g, or starts or ends with clk or _ck.
      IPADs and OPADs are not added.
      Padded files are generated for EDIF output only; they are not generated for VHDL and Verilog output.
    •  Create NDF Synthesis Optimization Interface for NGC cores
      In earlier releases of the ISE® software, CORE Generator created a single flat structural EDIF netlist with an .EDN extension for every IP core it generated. Third party synthesis tools (for example, Mentor Graphics LeonardoSpectrum used this EDN file to infer resources utilized by the core as well as rough timing information. The synthesis tool used this information to optimize the elaboration of the surrounding design logic.
      In the current release, the logic implementation of certain new CORE Generator IP is described by a single NGC file. For third party synthesis tools to infer resource utilization and timing from the NGC files associated with these new cores, you must enable the Create NDF Synthesis Optimization Interface for NGC cores project option to generate a new NDF format file for each NGC output file.
      Refer to your synthesis tool documentation for information on support for this feature.
  •  Temporary Directory
    Specifies the directory where temporary files produced by the CORE Generator are placed. You must have write permission for this directory.
See Also

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